Regviz

Silicon Labs /MGM240SA22VNA /EUSART1_NS /CLKDIV

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Interpret as CLKDIV

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Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Silicon Labs/EFR32BG22C224F512GM32/EUART0_S/CLKDIV#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DIV

Description

No Description

Fields

DIV

Fractional Clock Divider

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data